Dr. Abhi Rajagopala’s experience has been in design of heterogeneous computing systems involving FPGA accelerator designs. This involves design of Flight Control systems (Light Combat Aircrafts), Barcode and RFID printing systems, digital controllers for power electronics (DOE), FPGA synchronizers for smart-grid systems, and design of exa-scale multicore systems (LANL). His dissertation investigates methods to improve designer productivity for FPGA designs using High-level synthesis for next generation memories. While working as a visiting researcher at Information Science Institute, his research involves Partial Reconfiguration for space systems (NASA), Intel’s HARP platform, and evaluation of next-generation 3D memories (Micron).
PhD Electrical Engineering, University of North Carolina at Charlotte
MS Electrical Engineering, University of North Carolina at Charlotte
